******************************************************************************* * cia.device.I Written by Readysoft. * Copyright 1993,1994 RS. All rights reserved. 1993.02.25.-1994.05.18. * v1.24. ******************************************************************************* ******************************************************************************* * Macros ******************************************************************************* ;------------------------------------------------------------------------------ ; CiaName Macro ;------------------------------------------------------------------------------ CIA.NAM MACRO DC.B 'cia.device',0 EVEN ENDM ******************************************************************************* * Constant Definitions ******************************************************************************* ;------------------------------------------------------------------------------ ; Base Addresses ;------------------------------------------------------------------------------ cia_A EQU $bfe001 cia_B EQU $bfd000 ;------------------------------------------------------------------------------ ; Register Offsets ;------------------------------------------------------------------------------ cia_PRA EQU 0<<8 data register A cia_PRB EQU 1<<8 data register B cia_DDRA EQU 2<<8 data direction A cia_DDRB EQU 3<<8 data direction B cia_TALO EQU 4<<8 timer A low cia_TAHI EQU 5<<8 timer A high cia_TBLO EQU 6<<8 timer B low cia_TBHI EQU 7<<8 timer B high cia_TODL EQU 8<<8 counter 0-7 bits cia_TODM EQU 9<<8 counter 8-15 bits cia_TODH EQU 10<<8 counter 16-23 bits cia_NU EQU 11<<8 not used cia_SDR EQU 12<<8 serial data register cia_ICR EQU 13<<8 interrupt register cia_CRA EQU 14<<8 control register A cia_CRB EQU 15<<8 control register B ;------------------------------------------------------------------------------ ; cia_A Register Addresses ;------------------------------------------------------------------------------ cia_APRA EQU cia_A+cia_PRA cia_APRB EQU cia_A+cia_PRB cia_ADDRA EQU cia_A+cia_DDRA cia_ADDRB EQU cia_A+cia_DDRB cia_ATALO EQU cia_A+cia_TALO cia_ATAHI EQU cia_A+cia_TAHI cia_ATBLO EQU cia_A+cia_TBLO cia_ATBHI EQU cia_A+cia_TBHI cia_ATODL EQU cia_A+cia_TODL cia_ATODM EQU cia_A+cia_TODM cia_ATODH EQU cia_A+cia_TODH cia_ASDR EQU cia_A+cia_SDR cia_AICR EQU cia_A+cia_ICR cia_ACRA EQU cia_A+cia_CRA cia_ACRB EQU cia_A+cia_CRB ;------------------------------------------------------------------------------ ; cia_B Register Addresses ;------------------------------------------------------------------------------ cia_BPRA EQU cia_B+cia_PRA cia_BPRB EQU cia_B+cia_PRB cia_BDDRA EQU cia_B+cia_DDRA cia_BDDRB EQU cia_B+cia_DDRB cia_BTALO EQU cia_B+cia_TALO cia_BTAHI EQU cia_B+cia_TAHI cia_BTBLO EQU cia_B+cia_TBLO cia_BTBHI EQU cia_B+cia_TBHI cia_BTODL EQU cia_B+cia_TODL cia_BTODM EQU cia_B+cia_TODM cia_BTODH EQU cia_B+cia_TODH cia_BSDR EQU cia_B+cia_SDR cia_BICR EQU cia_B+cia_ICR cia_BCRA EQU cia_B+cia_CRA cia_BCRB EQU cia_B+cia_CRB ;------------------------------------------------------------------------------ ; cia_APRA Bit Definitions ;------------------------------------------------------------------------------ cia_APRA_b_OVL EQU 0 cia_APRA_b_LED EQU 1 cia_APRA_b_CHNG EQU 2 cia_APRA_b_WPRO EQU 3 cia_APRA_b_TK0 EQU 4 cia_APRA_b_RDY EQU 5 cia_APRA_b_FIR0 EQU 6 cia_APRA_b_FIR1 EQU 7 ;------------------------------------------------------------------------------ ; cia_APRA Bit Values ;------------------------------------------------------------------------------ cia_APRA_OVL EQU 1<<0 cia_APRA_LED EQU 1<<1 cia_APRA_CHNG EQU 1<<2 cia_APRA_WPRO EQU 1<<3 cia_APRA_TK0 EQU 1<<4 cia_APRA_RDY EQU 1<<5 cia_APRA_FIR0 EQU 1<<6 cia_APRA_FIR1 EQU 1<<7 ;------------------------------------------------------------------------------ ; cia_BPRA Bit Definitions ;------------------------------------------------------------------------------ cia_BPRA_b_BUSY EQU 0 cia_BPRA_b_POUT EQU 1 cia_BPRA_b_SEL EQU 2 cia_BPRA_b_DSR EQU 3 cia_BPRA_b_CTS EQU 4 cia_BPRA_b_CD EQU 5 cia_BPRA_b_RTS EQU 6 cia_BPRA_b_DTR EQU 7 ;------------------------------------------------------------------------------ ; cia_BPRA Bit Values ;------------------------------------------------------------------------------ cia_BPRA_BUSY EQU 1<<0 cia_BPRA_POUT EQU 1<<1 cia_BPRA_SEL EQU 1<<2 cia_BPRA_DSR EQU 1<<3 cia_BPRA_CTS EQU 1<<4 cia_BPRA_CD EQU 1<<5 cia_BPRA_RTS EQU 1<<6 cia_BPRA_DTR EQU 1<<7 ;------------------------------------------------------------------------------ ; cia_BPRB Bit Definitions ;------------------------------------------------------------------------------ cia_BPRB_b_STEP EQU 0 cia_BPRB_b_DIR EQU 1 cia_BPRB_b_SIDE EQU 2 cia_BPRB_b_SEL0 EQU 3 cia_BPRB_b_SEL1 EQU 4 cia_BPRB_b_SEL2 EQU 5 cia_BPRB_b_SEL3 EQU 6 cia_BPRB_b_MTR EQU 7 ;------------------------------------------------------------------------------ ; cia_BPRB Bit Values ;------------------------------------------------------------------------------ cia_BPRB_STEP EQU 1<<0 cia_BPRB_DIR EQU 1<<1 cia_BPRB_SIDE EQU 1<<2 cia_BPRB_SEL0 EQU 1<<3 cia_BPRB_SEL1 EQU 1<<4 cia_BPRB_SEL2 EQU 1<<5 cia_BPRB_SEL3 EQU 1<<6 cia_BPRB_MTR EQU 1<<7 ;------------------------------------------------------------------------------ ; cia_ICR Bit Definitions ;------------------------------------------------------------------------------ cia_ICR_b_TA EQU 0 timer A cia_ICR_b_TB EQU 1 timer B cia_ICR_b_ALRM EQU 2 alarm cia_ICR_b_SP EQU 3 serial port cia_ICR_b_FLG EQU 4 flag cia_ICR_b_IR EQU 7 interrupt generated cia_ICR_b_SC EQU 7 set | clear ;------------------------------------------------------------------------------ ; cia_ICR Bit Values ;------------------------------------------------------------------------------ cia_ICR_TA EQU 1<<0 cia_ICR_TB EQU 1<<1 cia_ICR_ALRM EQU 1<<2 cia_ICR_SP EQU 1<<3 cia_ICR_FLG EQU 1<<4 cia_ICR_IR EQU 1<<7 cia_ICR_SC EQU 1<<7 ;------------------------------------------------------------------------------ ; cia_CRA Bit Definitions ;------------------------------------------------------------------------------ cia_CRA_b_START EQU 0 timer A start=1/stop=0 cia_CRA_b_PBON EQU 1 timer A out on PB6=1 cia_CRA_b_OUTM EQU 2 outmode close=1/imp.=0 cia_CRA_b_RUNM EQU 3 runmode once=1/repeat=0 cia_CRA_b_LOAD EQU 4 load now=1 cia_CRA_b_INM EQU 5 inmode CNT=1/02=0 cia_CRA_b_SPM EQU 6 spmode out=1/in=0 cia_CRA_b_TODIN EQU 7 50 Hz=1/60 Hz=0 ;------------------------------------------------------------------------------ ; cia_CRA Bit Values ;------------------------------------------------------------------------------ cia_CRA_START EQU 1<<0 cia_CRA_PBON EQU 1<<1 cia_CRA_OUTM EQU 1<<2 cia_CRA_RUNM EQU 1<<3 cia_CRA_LOAD EQU 1<<4 cia_CRA_INM EQU 1<<5 cia_CRA_SPM EQU 1<<6 cia_CRA_TODIN EQU 1<<7 ;------------------------------------------------------------------------------ ; cia_CRB Bit Definitions ;------------------------------------------------------------------------------ cia_CRB_b_START EQU 0 timer B start=1/stop=0 cia_CRB_b_PBON EQU 1 timer B out on PB7=1 cia_CRB_b_OUTM EQU 2 outmode close=1/imp.=0 cia_CRB_b_RUNM EQU 3 runmode once=1/repeat=0 cia_CRB_b_LOAD EQU 4 load now=1 cia_CRB_b_INM EQU 5 inmode 02=00/CNT=01 cia_CRB_b_INM2 EQU 6 inmode2 TA=10/TA&CNT=11 cia_CRB_b_ALRM EQU 7 set alarm=1/clock=0 ;------------------------------------------------------------------------------ ; cia_CRB Bit Values ;------------------------------------------------------------------------------ cia_CRB_START EQU 1<<0 cia_CRB_PBON EQU 1<<1 cia_CRB_OUTM EQU 1<<2 cia_CRB_RUNM EQU 1<<3 cia_CRB_LOAD EQU 1<<4 cia_CRB_INM EQU 1<<5 cia_CRB_INM2 EQU 1<<6 cia_CRB_ALRM EQU 1<<7 ;------------------------------------------------------------------------------ ; Default values ;------------------------------------------------------------------------------ cia_ADDRA_def EQU $03 cia_ADDRB_def EQU $ff cia_BDDRA_def EQU $c0 cia_BDDRB_def EQU $ff ;------------------------------------------------------------------------------ ; Error Codes ;------------------------------------------------------------------------------ cia_er_OK EQU $00000000 all right cia_er_UnDef EQU $8001ffff undefined error ******************************************************************************* * Varibles ******************************************************************************* RSRESET cia_SizeOf RS.B 0 ******************************************************************************* * Routine Offsets ******************************************************************************* RSRESET RS.B -6 cia_Init RS.B -6 cia_Delay RS.B -6